Required SoC Input Output Architect, Silicon, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our Silicon team is driving the future of cloud data center computing. As a System on Chip Input Output (SoC IO) Architect, you will help define a new generation of our products. You will have pivotal responsibilities and serve as the organization Mobile Industry Processor Interface (MIPI) focal point.
Responsibilities
Evaluate different silicon solutions for executing Mobile Industry Processor Interface and other input/output peripheries, off-the-shelf components, vendor co-developments, and custom designs.
Drive vendor execution in various engagements, standard component, build to specification, and co-developments.
Collaborate with software, design, verification, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
Create high performance hardware/software interfaces.
Collaborate in developing a new SoC.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our Silicon team is driving the future of cloud data center computing. As a System on Chip Input Output (SoC IO) Architect, you will help define a new generation of our products. You will have pivotal responsibilities and serve as the organization Mobile Industry Processor Interface (MIPI) focal point.
Responsibilities
Evaluate different silicon solutions for executing Mobile Industry Processor Interface and other input/output peripheries, off-the-shelf components, vendor co-developments, and custom designs.
Drive vendor execution in various engagements, standard component, build to specification, and co-developments.
Collaborate with software, design, verification, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
Create high performance hardware/software interfaces.
Collaborate in developing a new SoC.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
15 years of experience working with mobile industry processor interface (C-PHY and D-PHY) architecture.
6 years of experience in people management and developing employees.
Experience with system design principles for low latency, low power, throughput, security, and reliability.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Experience with signal integrity and power integrity.
Preferred qualifications:
Masters degree or PhD in Electrical Engineering or Computer Engineering.
Experience with USB, Multi-Gigabit Ethernet (MGBE), PCIe and display port IPs.
Experience with post-silicon bring-up and lab work.
Familiarity with Gigabit Multimedia Serial Link (GMSL).
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
15 years of experience working with mobile industry processor interface (C-PHY and D-PHY) architecture.
6 years of experience in people management and developing employees.
Experience with system design principles for low latency, low power, throughput, security, and reliability.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Experience with signal integrity and power integrity.
Preferred qualifications:
Masters degree or PhD in Electrical Engineering or Computer Engineering.
Experience with USB, Multi-Gigabit Ethernet (MGBE), PCIe and display port IPs.
Experience with post-silicon bring-up and lab work.
Familiarity with Gigabit Multimedia Serial Link (GMSL).
This position is open to all candidates.
