we are looking for a Senior Board Design Engineer.
As a Hardware Board Design Engineer , you will own the electrical design of complex Big Data Analytics systems. You will drive the development of next-generation Analytics Processing Unit (APU) accelerator boards, ensuring they meet signal integrity, power delivery, and thermal requirements. You will work cross-functionally with Silicon (ASIC), Signal Integrity, Power, Mechanical, and Manufacturing teams to bring products from concept to mass production.
Responsibilities:
Lead the schematic capture and component selection for high-density, multi-layer Printed Circuit Boards (20+ layers) incorporating high-power ASICs (APUs) and high-speed memory (LPDDR5/DDR5).
Design and validate high-speed interfaces including Peripheral Component Interconnect Express (PCIe) Gen 5, DDR5 and LPDDR5.
Collaborate and manage Signal Integrity (SI) engineers to define routing constraints and stack-up.
Work closely with PCB layout designers to guide placement and routing of critical signals and power planes.
Lead the lab bring-up of first silicon/first board. Debug complex hardware issues. Root-cause failures to component, assembly, or design issues
As a Hardware Board Design Engineer , you will own the electrical design of complex Big Data Analytics systems. You will drive the development of next-generation Analytics Processing Unit (APU) accelerator boards, ensuring they meet signal integrity, power delivery, and thermal requirements. You will work cross-functionally with Silicon (ASIC), Signal Integrity, Power, Mechanical, and Manufacturing teams to bring products from concept to mass production.
Responsibilities:
Lead the schematic capture and component selection for high-density, multi-layer Printed Circuit Boards (20+ layers) incorporating high-power ASICs (APUs) and high-speed memory (LPDDR5/DDR5).
Design and validate high-speed interfaces including Peripheral Component Interconnect Express (PCIe) Gen 5, DDR5 and LPDDR5.
Collaborate and manage Signal Integrity (SI) engineers to define routing constraints and stack-up.
Work closely with PCB layout designers to guide placement and routing of critical signals and power planes.
Lead the lab bring-up of first silicon/first board. Debug complex hardware issues. Root-cause failures to component, assembly, or design issues
Requirements:
Bachelors degree in electrical engineering, or equivalent practical experience.
6 years of experience in board design (schematic and layout supervision) for server, networking, or high-performance computing products.
Experience in designing with serial interfaces (e.g., SerDes, PCIe, Ethernet, DDR) and signal integrity (insertion loss, crosstalk, impedance matching).
Experience bringing up complex SoCs and debugging interaction between hardware, firmware, and software.
Hands-on lab skills.
Proficiency with Electronic Design Automation (EDA) tools (Cadence Concept/Allegro, or similar).
Bachelors degree in electrical engineering, or equivalent practical experience.
6 years of experience in board design (schematic and layout supervision) for server, networking, or high-performance computing products.
Experience in designing with serial interfaces (e.g., SerDes, PCIe, Ethernet, DDR) and signal integrity (insertion loss, crosstalk, impedance matching).
Experience bringing up complex SoCs and debugging interaction between hardware, firmware, and software.
Hands-on lab skills.
Proficiency with Electronic Design Automation (EDA) tools (Cadence Concept/Allegro, or similar).
This position is open to all candidates.
