As an SoC Debug and Monitoring Architect, you’ll work closely with internal system teams and external customers to develop a comprehensive understanding of debug requirements as well as monitoring requirements and define methods and technologies to debug SoCs and connect to the Cloud monitoring infrastructure. You will also work closely with the Engineering teams to drive the optimal balance between performance, features, power, schedule, and cost.
Responsibilities
Work with Platform, Software, and CPU Architecture teams to define the debug, and monitoring of the custom core and implement ARM debug architecture features.
Work with the Silicon Design teams to define the required debug features.
Work on ARMs debug and monitoring philosophy and architecture, and configure it to SoC needs.
Utilize ARM infrastructure to architect a solution for debug and monitoring.
Responsibilities
Work with Platform, Software, and CPU Architecture teams to define the debug, and monitoring of the custom core and implement ARM debug architecture features.
Work with the Silicon Design teams to define the required debug features.
Work on ARMs debug and monitoring philosophy and architecture, and configure it to SoC needs.
Utilize ARM infrastructure to architect a solution for debug and monitoring.
Requirements:
Bachelor’s degree in Electrical Engineering, Computer Science or relevant technical field or equivalent practical experience.
Candidates will typically have 5 years of experience with ARM Debug and Monitoring technologies
Experience with architecting Debug and Monitoring solutions for CPUs or SOCs.
Bachelor’s degree in Electrical Engineering, Computer Science or relevant technical field or equivalent practical experience.
Candidates will typically have 5 years of experience with ARM Debug and Monitoring technologies
Experience with architecting Debug and Monitoring solutions for CPUs or SOCs.
Preferred qualifications:
5 or more cycles of relevant industry experience (debug) with technical leadership.
Experience with 5 or more cycles of SoC architecture and systems.
Experience with 2 or more cycles of Servers SOC debug architecture.
This position is open to all candidates.
