Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of platforms, we make product portfolio possible. We’re proud to be our engineers’ engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Enable and validate ownership (e.g., functional, electrical, compliance testing, performance) of multiple high-speed interfaces blocks.
Understand the design and Interact with architecture, design and verification teams to build a complete validation and characterization plan.
Lead a team of validation engineers. Plan tasks, allocate the required resources and track the overall execution.
Deliver tools to internal/external customers, for system level testing purposes.
Support system debug and integration of new Dual in-Line Memory Module (DIMM) vendors and knowledge of ARM based SoC architecture (e.g., Boot flow, High-speed I/F initialization).
Bachelor’s degree in Electronic Engineering, Computer Engineering, or equivalent practical experience.
Experience leading validation teams through a full cycle from concept to delivery.
Experience in people management.
Experience with high-speed Interface PHY/Controller post silicon validation activities, including electrical validation and PHY compliance.
Preferred qualifications:
Experience in embedded code development (e.g., C/C++).
Experience in DDR compliance measurements using high-end equipment (e.g., Oscilloscope, logic).
Experience in PCIe compliance measurements using high-end equipment (e.g., Analyzer, Exerciser).
Experience with development in pre-silicon tools (e.g., Field Programmable Gate Array (FPGA), Emulator).
Knowledge of ARM based SoC architecture (e.g., Boot flow, High-speed I/F initialization).
