What you’ll be doing:
Implement Chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design) .
Be exposed and work on a variety of functional and structural challenges. Including functional debug, getting ready for physical design, emulation, resolve design quality issues.
Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks
Taking part in flows development and deployment
B.SC./ M.SC. in Electrical Engineering/Computer Engineering.
10+ years of actual design experience in chip design
Solid hands-on RTL design skills in System-Verilog
Passion for quality and readiness to physical design, emulation, firmware and other customers
Proficiency in at least one scripting languages like python, bash, tcl.
Great teammate.
