We are looking for a senior VLSI Design Engineer highly experienced in developing designs for complex SoC devices, from arch/uarch definition to coding and verification. In this position you will have end-to-end responsibility for all design flow. In this position you will be responsible for full cluster/block uarch, design, initial synth, lint, integrating and supporting PD, DFT and verification.
If you are curious, innovative, has strong technical skills with a hands-on approach, and understand the full design, system view and SW integration requirements, this position is for you!
About Us:
Our group is responsible for the development of our next generation SoC for AI Compute. The development starts from product definition through architecture, design, verification and up to implementation.
The complex SoC is a high-performance device running AI computer for vision and audio processing, with technologies from multi-disciplines.
If you are curious, innovative, has strong technical skills with a hands-on approach, and understand the full design, system view and SW integration requirements, this position is for you!
About Us:
Our group is responsible for the development of our next generation SoC for AI Compute. The development starts from product definition through architecture, design, verification and up to implementation.
The complex SoC is a high-performance device running AI computer for vision and audio processing, with technologies from multi-disciplines.
Requirements:
5+ years of experience as a VLSI design engineer
B.Sc./M.Sc. degree in electrical/computer engineering from a leading university
Experience in defining uarch and design of complex design units.
SoC design experience.
full cluster/block uarch, design, inital synth, lint, integrating and supporting PD, DFT and verification.
Advantages:
Experience in high-speed interfaces DDR/PCIe – great advantage!
Leading VLSI teams/projects
Verification experience and knowledge with SV/UVM
CPU subsystem & multi-core designs experience
Experience with Synthesis and STA analysis.
5+ years of experience as a VLSI design engineer
B.Sc./M.Sc. degree in electrical/computer engineering from a leading university
Experience in defining uarch and design of complex design units.
SoC design experience.
full cluster/block uarch, design, inital synth, lint, integrating and supporting PD, DFT and verification.
Advantages:
Experience in high-speed interfaces DDR/PCIe – great advantage!
Leading VLSI teams/projects
Verification experience and knowledge with SV/UVM
CPU subsystem & multi-core designs experience
Experience with Synthesis and STA analysis.
This position is open to all candidates.
