We are now looking for a Senior Chip Design Verification Engineer for the Switch Silicon group.
As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
Requirements:
4+ years of experience in RTL design or RTL verification.
Previous experience in networking – an advantage.
B.Sc. in Electrical Engineering or Computer Engineering.
A team player with good communication and interpersonal skills.
4+ years of experience in RTL design or RTL verification.
Previous experience in networking – an advantage.
B.Sc. in Electrical Engineering or Computer Engineering.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
