We are looking for a Senior Mixed-Signal/Analog/IO Circuit Design Engineer someone who is enthusiastic to join a growing and hardworking group of diverse individuals responsible for handling challenge high-speed circuits and networking interface designs. Our team is responsible for the development of the networking and connectivity solution for our company's High-Performance-Computing products.
What you'll be doing:
Mixed-Signal/Analog circuit design for High Speed circuit and I/O Interfaces
Solve challenges of circuit designs in advanced node CMOS FinFET processes
Take designs through productization and be involved in all stages of development, from concept to product
Work with multi-functional teams to optimize the designs.
What you'll be doing:
Mixed-Signal/Analog circuit design for High Speed circuit and I/O Interfaces
Solve challenges of circuit designs in advanced node CMOS FinFET processes
Take designs through productization and be involved in all stages of development, from concept to product
Work with multi-functional teams to optimize the designs.
Requirements:
BSEE, MSEE or PhD
Candidate must have 5+ years of well-rounded High-Speed circuits designs such as ADC, DAC, PLL, and SerDes related design experience.
A teammate with good interpersonal skills
System-level architecture, timing budgets, specs, and analysis
In-depth understanding of deep submicron CMOS FinFET process and circuit design issues
Familiarity with device reliability, ESD, and Latch-Up requirements
Supervise layout development and understand all physical implementation aspects
Ways to stand out from the crowd :
Deep understanding of package substrate, board design, and power delivery.
Extensive experience in using advanced simulation tools
Hands on with Lab test and measurement equipment is a plus.
BSEE, MSEE or PhD
Candidate must have 5+ years of well-rounded High-Speed circuits designs such as ADC, DAC, PLL, and SerDes related design experience.
A teammate with good interpersonal skills
System-level architecture, timing budgets, specs, and analysis
In-depth understanding of deep submicron CMOS FinFET process and circuit design issues
Familiarity with device reliability, ESD, and Latch-Up requirements
Supervise layout development and understand all physical implementation aspects
Ways to stand out from the crowd :
Deep understanding of package substrate, board design, and power delivery.
Extensive experience in using advanced simulation tools
Hands on with Lab test and measurement equipment is a plus.
This position is open to all candidates.
