Required Experienced SoC Verification Engineer
The position
Which team will you join?
Our EyeC VLSI team – a group designing the chips for Radar and LiDAR systems for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like?
You will take a central hands-on role in Design Verification
Define Environment micro-Architect, Implement complex UVM environment, Build vPlan
Execute coverage implementation
Be part of external IP verification and Internal custom IP
Be part of System definition and top-level activity
Take part in Silicon bring-up.
The position
Which team will you join?
Our EyeC VLSI team – a group designing the chips for Radar and LiDAR systems for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like?
You will take a central hands-on role in Design Verification
Define Environment micro-Architect, Implement complex UVM environment, Build vPlan
Execute coverage implementation
Be part of external IP verification and Internal custom IP
Be part of System definition and top-level activity
Take part in Silicon bring-up.
Requirements:
Bsc/MSC in Electrical engineering/Computer engineering
3 years in a design verification role
Experience in UVM
Experience in System Verilog
Experience in high-speed I/F – Advantage.
Bsc/MSC in Electrical engineering/Computer engineering
3 years in a design verification role
Experience in UVM
Experience in System Verilog
Experience in high-speed I/F – Advantage.
This position is open to all candidates.
