Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!
What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.
What we need to see:
B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
Strong programming skills in scripting languages.
Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.
Ways to stand out from the crowd:
Hands on DFT/ATPG knowledge & technical experience in DFT ASIC Design and in ATPG tools.
Knowledge of DFT including scan, MBIST, LBIST, on-chip scan compression, fault models, ATPG, and fault simulation.
Experience in Mentor TestKompress ATPG tool and retargeting flow.
Programming languages: TCL, PRL, Phyton & Unix shell scripts.
Experience with ATE and Silicon bring-up.
