In this role, you will be driving CPU architecture exploration by analyzing performance metrics (latency, power, code density) across benchmarks and CPU families. Investigate optimization opportunities through customizing ISAs and microarchitecture features to improve power and performance. You will develop simulation analysis tools and toolchain infrastructure for CPU/SOC architectures. You will collaborate closely with Apple's algorithm and software teams to build efficient CPUs, enhancing performance for diverse use cases.
Description
You will be responsible to create analysis tools to assist in architecture exploration. You will define and simulate CPU features and develop supporting tool chains including simulators, analysis tools, compiler, etc.. You will collaborate with SW and algorithm teams as well as implementation teams to define and build efficient CPUs that integrate seamlessly into various subsystems.
Responsibilities
Work with SW and algorithm teams for optimization and customization of ISAs, CPU architecture, and micro architecture features
Create and analyze benchmarks for CPU and SOC subsystem architectures
Develop architectural and performance simulators
Define and develop toolchain infrastructure
Description
You will be responsible to create analysis tools to assist in architecture exploration. You will define and simulate CPU features and develop supporting tool chains including simulators, analysis tools, compiler, etc.. You will collaborate with SW and algorithm teams as well as implementation teams to define and build efficient CPUs that integrate seamlessly into various subsystems.
Responsibilities
Work with SW and algorithm teams for optimization and customization of ISAs, CPU architecture, and micro architecture features
Create and analyze benchmarks for CPU and SOC subsystem architectures
Develop architectural and performance simulators
Define and develop toolchain infrastructure
Requirements:
Prior knowledge or familiarity with ARM or RISC-V instruction sets
Strong understanding of embedded CPU architecture and micro architecture
Background and experience with software build processes including binary tools and toolchains
Knowledge in C++ and Python
Experience with software optimization including SIMD and vector processing
Experience with using CPU simulators
Prior knowledge or familiarity with ARM or RISC-V instruction sets
Strong understanding of embedded CPU architecture and micro architecture
Background and experience with software build processes including binary tools and toolchains
Knowledge in C++ and Python
Experience with software optimization including SIMD and vector processing
Experience with using CPU simulators
This position is open to all candidates.
