Contribute to CPU front-end designs, emphasizing micro-architecture and RTL design for next generation CPU.
Propose performance enhancing micro-architecture features with efficiency in mind. Work with architects and performance teams for trade-off studies.
Deliver designs that meet power, performance, and area (PPA) goals with production quality.
Interpret techniques into design constructs and languages in order to provide guidance to and participate in the performance modeling effort.
Propose performance enhancing micro-architecture features with efficiency in mind. Work with architects and performance teams for trade-off studies.
Deliver designs that meet power, performance, and area (PPA) goals with production quality.
Interpret techniques into design constructs and languages in order to provide guidance to and participate in the performance modeling effort.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
Experience with CPU microarchitecture.
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
Experience with CPU microarchitecture.
Preferred qualifications:
Experience in scripting languages like Python or Perl.
Knowledge of high performance and low power design techniques.
Knowledge of assertion-based formal verification.
This position is open to all candidates.
