Required ASIC Design Engineer
Within the BBIC team, you will be responsible for the specification, design and validation of various modules linked to our next chipsets generation.
You will work closely with our other teams (software, signal processing algorithms and integration).
RESPONSIBILITIES
Micro-architecture definitions at the unit level
Specification, design, RTL coding and optimization of complex blocks
Close work with the verification team on block/top level to ensure timely delivery of quality designs.
Within the BBIC team, you will be responsible for the specification, design and validation of various modules linked to our next chipsets generation.
You will work closely with our other teams (software, signal processing algorithms and integration).
RESPONSIBILITIES
Micro-architecture definitions at the unit level
Specification, design, RTL coding and optimization of complex blocks
Close work with the verification team on block/top level to ensure timely delivery of quality designs.
Requirements:
Engineering degree
Minimum of 3 years experience of ASIC and/or FPGA development.
Good experience of Verilog/VHDL
Knowledge of synthesis and static timing analysis tools would be a bonus
Experience of implementing digital signal processing modules would be a bonus
Fluent written and spoken English.
Engineering degree
Minimum of 3 years experience of ASIC and/or FPGA development.
Good experience of Verilog/VHDL
Knowledge of synthesis and static timing analysis tools would be a bonus
Experience of implementing digital signal processing modules would be a bonus
Fluent written and spoken English.
This position is open to all candidates.
