Required Senior CPU Design Verification Engineer, CloudNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to … Read more
Required CPU Design Verification Engineer, CloudNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the … Read more
Required Silicon Validation and Automation EngineerNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the … Read more
Required AI SoC Design Verification Engineer, Cloud About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and … Read more
Required Electrical Post-Silicon Characterization & Validation EngineerMeet the Team:The Silicon One Post-Silicon Electrical Validation (EPSV) team in Caesarea works on the fastest, most power-hungry networking chips in the industry. We are the hardware experts who take the raw silicon and prove it actually works in the real world. We don't just run scripts from a … Read more
Required ASIC Design & Verification EngineerMeet the TeamWe leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.Your Impact:Review micro-architecture specificationsImplement Verification environment … Read more
Required PHY Post Silicon Validation EngineerWhat You'll DoYoull be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon developmentOur team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation … Read more
Required Senior Verification Engineer – Silicon OneJob DescriptionMeet the TeamJoin the Silicon One Front-End Design Verification team, responsible for validating the most advanced networking silicon in the world. Our team ensures functional correctness, quality, and reliability across the entire design flow. We combine state-of-the-art methodologies with a collaborative, startup-like culture, while being backed by our … Read more
abra R&D is seeking for a Verification Engineer. We are looking for an Adaptable Verification Engineer who can move across blocks and tasks, partner with design/FPGA/architecture, and own floating assignments with partial specs. ?Key Responsibilities: * Build/maintain SystemVerilog/UVM environments; write testbenches, simulations, and regressions. * Analyze specs- create verification plans; drive debug and bug fixing to closure. … Read more
Lead V V activities throughout the product lifecycle, from concept to release. Develop and maintain V V documentation, including TEST Protocols, TEST Reports, and the V VMaster Plan. Own and drive integration and system -level testing processes to ensure timely and effectiveexecution. Manage and mentor a dedicated V V team, including task allocation, performance monitoring,and … Read more
