You'll be joining our Front-End Design team Silicon One, which is at the center of the silicon development. Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.
We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Requirements:
B.Sc/M.Sc in EE from a top university with a GPA above 85 RTL designer with 5-10 years of experience.
B.Sc/M.Sc in EE from a top university with a GPA above 85 RTL designer with 5-10 years of experience.
Experience in DSP logic Must.
Experience in Matlab simulations and Bit Exact environments.
Familiar with UVM and functional testing.
Familiar with mixed Signal systems/environments.
Knowledge & experience with Clock Domain Crossing.
* We are looking for exceptional individuals to join our team, experience in logic design or networking is not a must. You should be eager to learn and succeed!
This position is open to all candidates.
