We are looking for a Experienced DFT Engineer.
Requirements:
BSc. in Electrical Engineering (from known university)
Minimum 3 years of experience on DFT Must!
Knowledge and experience in the following is advantage:
Knowledge and experience with DFT methodologies (Scan, ATPG, @speed, memory BIST, I/O DFT)
Scan insertion and ATPG experience for stuck-at, transition delay, bridging and IDDQ
Coverage improvement and DFT DRC analysis using FTMAX / DFTCompiler / TetraMAX / SpyglassDFT – Memory BIST using Tessent MBIST (MentorGraphics)
Strong knowledge of JTAG 1149.1, 1149.6 and P1500 standards
Hands on design and implementation experience in DFT features
In depth understanding of DFT tool flows and methodologies (Synopsys or mentor or any other equivalent tools).Mentor Tessent MBIST experience is an added advantage
Hands on experience in end to end design flow (conception to TO to production) in DFT
Experience using Perl or other UNIX scripting languages for flow automation
Experience with Formal equivalence checking
Experience with setting up and running gate level simulations
BSc. in Electrical Engineering (from known university)
Minimum 3 years of experience on DFT Must!
Knowledge and experience in the following is advantage:
Knowledge and experience with DFT methodologies (Scan, ATPG, @speed, memory BIST, I/O DFT)
Scan insertion and ATPG experience for stuck-at, transition delay, bridging and IDDQ
Coverage improvement and DFT DRC analysis using FTMAX / DFTCompiler / TetraMAX / SpyglassDFT – Memory BIST using Tessent MBIST (MentorGraphics)
Strong knowledge of JTAG 1149.1, 1149.6 and P1500 standards
Hands on design and implementation experience in DFT features
In depth understanding of DFT tool flows and methodologies (Synopsys or mentor or any other equivalent tools).Mentor Tessent MBIST experience is an added advantage
Hands on experience in end to end design flow (conception to TO to production) in DFT
Experience using Perl or other UNIX scripting languages for flow automation
Experience with Formal equivalence checking
Experience with setting up and running gate level simulations
This position is open to all candidates.
