What you will be doing:
Join Beer-Sheva group, working on RiscV processors platform.
Verification for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work might involve any or all aspects of chip development: Verification, Design.
Work closely with firmware and other groups around the globe.
What we need to see:
B.SC./M.SC. or equivalent experience in Electrical Engineering/Communication Engineering/Computer Engineering.
5+ years of validated experience in RTL Frontend ASIC Verification (Chip Design).
High Level of English.
Ways to stand out from the crowd:
Extensive years of experience in RTL Frontend ASIC Verification (Chip Design).
Strong experience and knowledge in Specman.
Vast background and knowledge in system level aspects.
