What you'll be doing:
Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and engineer creative solutions – building frameworks, optimizing regressions, and accelerating simulation throughput through innovative tooling.
Multi-Language Development: Work across a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) – writing code and solving problems at every layer, from RTL testbenches to infrastructure utilities and automation.
System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance.
AI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks – applied to both verification and infrastructure challenges.
Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NIC.
What we need to see:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
8+ years of experience in verification, HW simulation, or infrastructure development for silicon projects.
Infrastructure mindset – a proven ability to enhance and scale the systems that drive verification: regression frameworks, simulation performance, tooling, and flow automation.
Creativity and proactivity – an innovation mindset with a proactive approach to adopting new methodologies and coding tools to solve complex challenges.
Strong debugging, problem-solving, and analytical skills.
A team player with good communication and interpersonal skills.
Ways to stand out:
Experience leveraging AI tools for verification automation or infrastructure acceleration.
Experience working in multi-language environments.
