In this role, you will lead a team of engineers who measure, analyze, and improve NIC, host, DOCA networking stack, and system-level performance across our networking products and platforms. We work across the full product lifecycle, from early architecture and pre-silicon modeling through post-silicon bring-up, validation, characterization, and GA readiness.
We are looking for someone who enjoys building teams, turning complex performance data into clear direction, and partnering across engineering groups to improve products that support AI, HPC, cloud, and accelerated networking workloads.
What Youll Be Doing:
Lead, coach, and develop a team focused on NIC, host, DOCA networking stack, and system-level performance. You will define performance test plans, methodologies, metrics, and success criteria for our new networking technologies.
Guide pre-silicon and post-silicon performance planning, analysis, reporting, and readiness reviews. Your team will benchmark and profile workloads across RDMA, RoCE, InfiniBand, Ethernet, MPI, NCCL, DOCA, storage, security, and host networking stacks.
Identify bottlenecks across NIC, DPU, CPU, memory, PCIe, firmware, drivers, Linux networking, DOCA, and full-system architecture. We will look to you to lead root-cause analysis, coordinate mitigation plans, and help hardware, firmware, software, architecture, validation, and product teams align on performance goals.
What We Need To See:
B.Sc. or M.Sc. in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience.
Experience in performance analysis, systems engineering, networking, or HPC/AI infrastructure.
10+ years of software engineering experience, including 4+ years in a leadership or management role.
Experience with high-performance networking technologies such as RDMA, RoCE, InfiniBand, Ethernet, MPI or NCCL.
Hands-on experience with system performance analysis, benchmarking, profiling, and root-cause analysis.
Understanding of host architecture, including CPUs, memory hierarchy, NUMA, PCIe, Linux OS, drivers, firmware, and DPU/NIC interactions.
Experience creating performance test plans for pre-silicon or post-silicon phases.
Programming or scripting experience with Python and Bash; C/C++ experience is helpful.
Ability to communicate technical findings clearly and work across engineering teams.
Ways To Stand Out from the Crowd
Experience with NICs or DPU architecture, networking offloads, host datapath behavior, networking services, or DPU offloads.
Experience with AI/HPC cluster performance, distributed training, inference workloads, collective communication libraries, telemetry pipelines, benchmark automation, CUDA, NCCL internals.
Linux kernel networking, DPDK, OVS, storage acceleration, or security offloads can also help you succeed in this role.
