With this position you'll be joining the VLSI team of the Camera group working on cutting-edge image signal processor (ISP).
You will be working on innovative design implementing novel image processing and computer vision algorithms (traditional and ML based) that will further raise the bar of image capture for mobile, auto, connected smart camera application and much more.
2-5 years of significant logic design engineering experience
Knowledge in digital design domain, preferably from the field of ASIC design front end activities
Hands on experience in micro-architecture definition from specification, RTL development and debug
Preferred Qualifications:
Experience in RTL implementation in image processing domain (pixel processing, filters, convolution)
Experience in scalable design implementation (definition and coding)
Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
Ability to work in a team
Ability to understand system wise aspects like interaction of HW with SW and FW
