You will
Define and drive architectures across multiple domains, spanning chip-level components, subsystems, and system-level workflows.
Translate product requirements into architectural specifications, features, and hardware/software execution models for implementation teams.
Lead cross-functional technical decisions, balancing functionality, performance, scalability, power, and implementation trade-offs.
What You'll Need
Strong foundation in hardware and chip design flows.
Communication technologies and industry standards (Ethernet, PCIe, UALink, OCP, UCIe).
Track record in ASIC/SoC projects from architecture definition to tape-out.
System-level understanding of HW/SW co-design and integration.
Modeling and system analysis capabilities (Python preferred).
Self-learner with initiative, able to drive activities independently and proactively.
Multidisciplinary problem-solving skills with an end-to-end system perspective.
Excellent documentation, specification writing, and presentation skills.
Strong interpersonal skills; team player with the ability to influence and lead across groups.
Experience with large datacenter ASICs (such as Ethernet switches) – advantage.
Experience with Forward Error Correction (FEC) schemes and high-speed link architectures – advantage.
Experience with SoC security and streaming security protocols (RoT, MACsec) – advantage.
Experience working in global, cross-functional, and multidisciplinary teams – advantage.
Collaboration with customers, vendors, and IP providers in complex projects – advantage.
Experience managing outsourcing activities, suppliers, and IP deliverables – advantage.
