What You'll Be Doing:
Lead and grow a team of formal verification engineers focused on pre-silicon FV of complex digital designs.
Define and drive strategies and methodologies across multiple projects to prove design correctness and ensure quality.
Collaborate closely with Architecture, Design, and DV teams to identify verification needs and drive closure.
Provide technical guidance, mentoring, and support to engineers on the team.
Own planning and execution of verification deliverables to ensure high quality and timely tapeouts.
What We Need to See:
BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics.
5+ years of managerial experience leading engineering teams in chip design or verification.
8+ years of industry experience in RTL design, functional verification, or related domains.
Strong understanding of chip design flows and verification methodologies.
Excellent leadership, analytical, problem-solving, and communication skills.
Ways to Stand Out from the Crowd:
Experience with formal verification tools and methodologies (e.g., JasperGold, VC Formal).
Background in assertions, coverage models, or formal testbench development.
Track record of building and scaling high-performing engineering teams.
A passion for recruiting, mentoring, and developing talent.
