Responsibilities
Develop simulators and architectural models of general-compute SoCs.
Collaborate with system architects, SoC and IP architects/designers, and software and application experts to understand current and future requirements.
Participate in architectural and design evaluation of SoC designs.
Perform pre-silicon performance simulation and correlate with post-silicon measurements.
Communicate analysis results qualitatively and quantitatively.
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience with C++ and Python.
Experience with analysis of multi-core SoC workload performance.
Experience creating or integrating simulation models of multi-core SoC subsystems at different levels of abstraction (e.g., cycle-accurate and TLM).
Preferred qualifications:
Experience with systemC.
Experience with SoC cycles in SoC performance modeling and analysis.
Knowledge of caches, mesh fabric, coherency, memory controllers, DRAM, PCIe, CPU, or GPU.
Ability to read, debug, and modify RTL and work with design flow, tools, and verilog language.
