We develop high-performance imaging radar for autonomously driving vehicles. The project involves cutting-edge HW, VLSI, mechanics, SW and Algorithms. We are looking for an Experienced Chip Package Design Engineer to be part of our imaging radar HW team.
What will your job look like:
Technical Project lead & Co Design to support the development of IC package with the OSAT, Si, VLSI and System Architecture teams.
Manage co-design meetings with HW, RF and VLSI teams
Design IC packages (e.g., flip-chip, wafer-level, FCBGA) using industry-standard EDA tools (e.g., Cadence APD/SIP, Mentor, Ansys tools)
Manage subcontractors and vendors for development and manufacturing of chip substrate, IC package and IC testing
Simulate high-performance signal/power-integrity chip substrate, including layout, mechanical & thermal simulations
Collaborate and support peer teams from other projects.
What will your job look like:
Technical Project lead & Co Design to support the development of IC package with the OSAT, Si, VLSI and System Architecture teams.
Manage co-design meetings with HW, RF and VLSI teams
Design IC packages (e.g., flip-chip, wafer-level, FCBGA) using industry-standard EDA tools (e.g., Cadence APD/SIP, Mentor, Ansys tools)
Manage subcontractors and vendors for development and manufacturing of chip substrate, IC package and IC testing
Simulate high-performance signal/power-integrity chip substrate, including layout, mechanical & thermal simulations
Collaborate and support peer teams from other projects.
Requirements:
B.Sc in Electrical Engineering
5+ years of hands-on experiences in chip package activities
3+ years of hands-on experience as managing chip packaging vendors
Experience with relevant CAD tooling for chip package development & simulation for layout, mechanical & thermal simulations
Experience with Digital High Speed, Analog and Power design
Experience with Signal Integrity and Power Integrity simulation tools for Digital and analog using IBIS and S-Parameters models advantage
Familiar with Automotive industry advantage
Experience with RFIC design and simulation – advantage.
B.Sc in Electrical Engineering
5+ years of hands-on experiences in chip package activities
3+ years of hands-on experience as managing chip packaging vendors
Experience with relevant CAD tooling for chip package development & simulation for layout, mechanical & thermal simulations
Experience with Digital High Speed, Analog and Power design
Experience with Signal Integrity and Power Integrity simulation tools for Digital and analog using IBIS and S-Parameters models advantage
Familiar with Automotive industry advantage
Experience with RFIC design and simulation – advantage.
This position is open to all candidates.
