חיפה
דוברי שפות
פורסם לפני יותר מחודש
פורסמה ברשת
In this role, you will work with architects, logic designers, and verification engineers to develop flows to build and verify SoC chip designs. You will also work closely with software, physical design, silicon bring-up and validation teams to enable a successful software integration, implementation, silicon bringup and deliver quality silicon.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google’s product portfolio possible. We’re proud to be our engineers’ engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Design, develop, and maintain CAD tools and scripts to automate and streamline design tasks, verification processes, and data analysis.
Administer and optimize the front-end compute environment, ensuring reliability, performance, and scalability.
Provide technical support and training to design and verification teams on the use of CAD tools, scripts, and the compute environment.
Identify opportunities to enhance front-end development workflows, implement improvements, and document best practices.
Work closely with design, verification, and CAD teams to understand their needs, gather requirements, and deliver effective solutions.

Requirements:
Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Experience in coding or scripting languages (e.g., Python, Perl, Tcl).
Experience with design construction towards physical implementation, emulation, and verification.
Experience working with cross-functional teams for high quality tape-outs.

Preferred qualifications:
Experience in CPU or SoC design, debug, and verification flows.
Experience working with Register-Transfer Level (RTL) teams and design integration methodologies that improve team productivity and velocity.
Experience with delivering chip design infrastructure or methodology including Multi-HDL model builds and CI/CD systems.

This position is open to all candidates.
מידת ההתאמה שלי לתפקיד
התאמה למשרה
התאמתך לתפקיד מחושבת על פי כישורך (כפי שסיפרת לנו עליהם) מול דרישות המעסיק - אין בכך כדי להעיד על קבלתך לעבודה (זה יחליט המעסיק)
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