We are looking for a talented VLSI Verification Engineer to join our team.
In this role, you will work on verifying complex ASIC designs, and collaborating with cross-functional teams to ensure silicon success.
You will define and implement verification strategies, debug failures, and contribute to the quality of our next-generation products.
Key Responsibilities:
Define verification plans and environment micro-architecture
Implement UVM-based verification environments
Debug and analyze failures at various stages of verification
Develop coverage models and metrics to assess design readiness
Support cross-functional teams (Analog, Backend, Production, etc.) on verification-related challenges.
In this role, you will work on verifying complex ASIC designs, and collaborating with cross-functional teams to ensure silicon success.
You will define and implement verification strategies, debug failures, and contribute to the quality of our next-generation products.
Key Responsibilities:
Define verification plans and environment micro-architecture
Implement UVM-based verification environments
Debug and analyze failures at various stages of verification
Develop coverage models and metrics to assess design readiness
Support cross-functional teams (Analog, Backend, Production, etc.) on verification-related challenges.
Requirements:
B.Sc. in Electrical Engineering or related field
0-4 years of experience in VLSI verification
Experience with SystemVerilog or Specman (UVM is a plus)
Preferred Qualifications
Experience in any of the following is a plus
Formal or Functional Verification tools
FPGA design verification
Mixed-signal verification
Scripting & automation for verification flows.
B.Sc. in Electrical Engineering or related field
0-4 years of experience in VLSI verification
Experience with SystemVerilog or Specman (UVM is a plus)
Preferred Qualifications
Experience in any of the following is a plus
Formal or Functional Verification tools
FPGA design verification
Mixed-signal verification
Scripting & automation for verification flows.
This position is open to all candidates.
