We are looking for a Senior DFT Engineer.As a Design for Test (DFT) Engineer, you will:Develop and implement DFT features to ensure high-quality, testable, and manufacturable designs.Contribute to the full product cycle, from pre-silicon design to post-silicon debug and production qualification.Work closely with chip architects, design engineers, and verification teams to define and optimize DFT … Read more
We are looking for a Senior CAD Physical Design Engineer.WHAT YOU'LL DO:You'll be joining our Physical Design team , which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.Our Backend Engineers handle all aspects of … Read more
We are looking for a ASIC Modeling Architect Engineer.What You'll Do:You'll join our architecture team, central to silicon development.You will define features of future devices using the latest silicon technologies, focusing on Logic Design and coding.You will be responsible for defining the device specification. Requirements: Electrical engineer with 5 years experience.Strong Logic Design and coding … Read more
We are looking for a IC Package Design Engineer.What You Will Do:As a member of the Package Design Team, you will: Lead package design tasks, being responsible for planning, coordinating with partners, and driving schedules from start to finish.Optimize package pinouts, stack-ups, placements, power distribution, and high-speed routing while balancing functional needs, manufacturing constraints, and … Read more
We are looking for a PHY Validation Engineer.What You'll Do:Youll be joining the post silicon validation team in PHY system group Silicon One group as part of the silicon development .Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing … Read more
Join the team in developing a unified silicon architecture for web-scale and service provider networks.the team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, café, social interest groups, and philanthropy) with the startup culture and … Read more
We are looking for a Signal Integrity Engineer .As a Signal/Power Integrity Engineer, you will play a key role in ensuring the performance and reliability of our high-speed SerDes IP, covering silicon, package, and board-level analysis. You will collaborate across multiple fields, including analog design, silicon integration, PCB & package design, and mechanical engineering.Provide implementation … Read more
We are looking for an Analog Engineer.As an Analog Design Engineer, you will:Design and develop high-speed analog/mixed-signal circuits for industry-leading CMOS process nodes.Lead all design stages, from architecture definition to final layout sign-off.Perform circuit simulations, analysis, and debugging to ensure robust performance and reliability.Collaborate with system architects, digital designers, and layout engineers to optimize circuit … Read more
We are looking for a Senior Asic Design – Silicon One.You'll join the Front-End Design team Silicon One, responsible for all chip design processes from definition and microarchitecture to final product.Our design engineers engage in every aspect of chip design: definition, design, verification, signoff, and validation through to production.We apply the latest silicon technologies and … Read more
Join the Silicon One PHY System Team, a key part of our silicon development. You'll be at the forefront of defining, implementing, and validating advanced PHY and system solutions for next-generation network devices.Your responsibilities will include:Defining features for future devices utilizing cutting-edge silicon technologies.Developing and optimizing PHY firmware and calibration processes.Driving system-level definitions, operations, and … Read more
