What youll be doing:
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area, and performance.
Be a part of the networking team, in charge of multiple areas in the most challenging next generation chips.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
What we need to see:
B.SC student (3rd year) in Computer Engineering/Electrical Engineering/Communication Engineering.
High Level of English.
Completion of programming and logic design courses with high scores – Advantage.
A team player with good communication and interpersonal skills.
Ways to stand out from the crowd:
Background in Specman.
Validated experience in Verification (Chip Design).
Knowledge in HDL (Verilog/VHDL).
