In this role, you will take part in CPU development, leading the CPU architecture and microarchitecture definitions. You will collaborate with software and hardware architects, design, verification, and physical implementation teams. You will influence the building of processor performance analysis infrastructure with modeling, emulation, and silicon measurement and drive power and performance optimizations for our specific customers workloads.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google’s product portfolio possible. We’re proud to be our engineers’ engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Lead architectural definition of CPU core designs, facilitate and make final decisions.
Participate in and influence the building of processor performance analysis infrastructure.
Influence the development of architectural models with varying configurations across product categories.
Perform Performance, Power, Area (PPA) trade-off analysis for architecture and microarchitecture features, communicate analysis results in both qualitative and quantitative fashion to support decisions.
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
8 years of experience with microprocessor architecture and related technologies and algorithms.
Experience with CPU architecture performance analysis, tools, and simulators at different abstraction levels (i.e., cycle accurate, functional, emulation).
Preferred qualifications:
Advanced degree in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience analyzing workloads and definitions of microarchitectural features.
Knowledge of ARM architecture.
