In this role you will be responsible to model, analysis and estimate power consumption of daily use cases on our next generation SoCs. Drive new ideas into micro-architecture, design and circuits to reduce SoC power across the dynamic range. Drive budgeting, measurement and analysis of overall SoC power for many use cases of interest. You Will work extensively with many teams across every stage of the project from Architectural definition through Design implementation and SW management to focus on power optimization.
To be successful in this role, you must have keen interest and motivativation to deliver best experience to our users, and wide perspective in order to work simultaneously on multiple disciplines. This role is required working closely with many cross-functional teams and good understanding of hardware and software interaction at system level.
To be successful in this role, you must have keen interest and motivativation to deliver best experience to our users, and wide perspective in order to work simultaneously on multiple disciplines. This role is required working closely with many cross-functional teams and good understanding of hardware and software interaction at system level.
In this highly visible role, you will be responsible for SOC power simulation and power modeling, SOC use case power analysis, and drive the future SOC power optimization.
Requirements:
Minimum Qualifications:
BS.c in EE / MS.c in EE or Computer Science/ Electrical Engineering required.
Minimum Qualifications:
BS.c in EE / MS.c in EE or Computer Science/ Electrical Engineering required.
Preferred Qualifications:
M.Sc. in Electrical Engineering.
Silicon power measurement experience.
Familiarity with multimedia data processing.
Coding in Python.
Familiarity with Verilog and System Verilog.
Familiar with Gen AI.
This position is open to all candidates.
