looking for a highly experienced and motivated VLSI Manager to lead the development of our next-generation ASICfrom initial concept to final production. In this pivotal role, you'll manage the entire ASIC development lifecycle, working closely with cross-functional teams and external partners to deliver cutting-edge technology that powers the future of autonomous vehicles.
Responsibilities
Own and lead the end-to-end ASIC development process.
Act as the central point of contact for all ASIC-related activities, collaborating with Product, Firmware, Computer Vision, Hardware, and other stakeholders.
Drive the ASIC program work plan, ensuring alignment and coordination across global teams and multiple workstreams.
Define and enforce VLSI development methodologies, design flows, and quality standards.
Evaluate and select both digital and analog IPs required for the ASIC.
Manage relationships and deliverables with external VLSI partners and service providers, ensuring high-quality outcomes.
Requirements:
B.Sc. in Electrical Engineering from a recognized institution.
Minimum 7 years of hands-on experience in microarchitecture and RTL design.
At least 3 years in a leadership role managing ASIC teams or projects.
Experience in leading ASIC programs from concept through production.
Deep understanding of the entire ASIC development lifecycle and its technical requirements.
Solid experience in digital IP and SoC design, verification, and implementation methodologies.
Proficiency in industry-standard EDA tools for Lint, CDC analysis, simulation, debugging, synthesis, and timing closure.
Excellent communication and interpersonal skills.
B.Sc. in Electrical Engineering from a recognized institution.
Minimum 7 years of hands-on experience in microarchitecture and RTL design.
At least 3 years in a leadership role managing ASIC teams or projects.
Experience in leading ASIC programs from concept through production.
Deep understanding of the entire ASIC development lifecycle and its technical requirements.
Solid experience in digital IP and SoC design, verification, and implementation methodologies.
Proficiency in industry-standard EDA tools for Lint, CDC analysis, simulation, debugging, synthesis, and timing closure.
Excellent communication and interpersonal skills.
This position is open to all candidates.
