As a chip micro architect at NVIDIA Networking business unit, you will join a group of passionate engineers to implement the next generation state-of-the-art BlueField DPU SOC and/or ConnectX NIC that deliver breakthrough networking, security, cloud, AI and storage performance to the AI data centers. As a design micro architect, you will make a real impact in a dynamic, technology-focused AI company while developing the industry’s best high-speed communication devices, delivering the highest throughput and lowest latency!
What you’ll be doing:
You will be part of a small and exclusive micro-architecture team and have the opportunity to make a real impact in designing the micro-architecture of the next generation state of the art network card hand in hand with the product architect making sure implementation meets the product goals.
Work closely with architecture and design teams to thoroughly understand system requirements and identify micro-architecture solutions, while weighing trade-offs related to performance, area and power consumption
Break high-level arch requirements into lower-level design building blocks. Focal point for the design team, reviewing implementation and guiding the team.
Find bottlenecks early in the development cycle using performance analysis and simulations.
Use your understanding of the entire chip and system to identify and debug pre and post silicon full-chip issues.
What we need to see:
B.Sc. in Electrical Engineering or equivalent experience.
5+ years of relevant experience in architecture/micro-architecture.
Deep understanding of RTL design including timing, area, power, and complexity considerations.
Problem solving and analytical skills.
Ability to document and present requirements to peers and design teams.
A team player with strong communication and interpersonal skills.
Ways to stand out from the crowd:
Professional RTL design implementation and implementation definition experience.
Prior experience of defining a network card and/or Smart NIC SoC, high-speed interconnects, switches.