We are looking for a Design Engineer for SOC Group.
In this role you will be familiar with cutting edge power management techniques including power management ICs control schemes, Chip power state transitions, SoC boot process and HW security solutions. You will define uArch spec, implement HW including RTL and UPF coding, synthesize the digital design to the latest process nodes and participate in the implementation process.
Description
Imagine what you could do here.
new ideas have a way of becoming extraordinary products very quickly.
Do you want to bring passion and dedication to your job? There's no telling what you could accomplish.
Do you want to join us to help deliver the next groundbreaking products?
The SoC design team is looking for an experienced engineer to develop compute SoCs power management system. Role expectations include working with partner Design teams, Physical design, verification, Platform Architecture and Software teams to define the power system micro architecture, implement the required HW and integrate it to a complex multi chip system.
In this role you will be familiar with cutting edge power management techniques including power management ICs control schemes, Chip power state transitions, SoC boot process and HW security solutions. You will define uArch spec, implement HW including RTL and UPF coding, synthesize the digital design to the latest process nodes and participate in the implementation process.
Description
Imagine what you could do here.
new ideas have a way of becoming extraordinary products very quickly.
Do you want to bring passion and dedication to your job? There's no telling what you could accomplish.
Do you want to join us to help deliver the next groundbreaking products?
The SoC design team is looking for an experienced engineer to develop compute SoCs power management system. Role expectations include working with partner Design teams, Physical design, verification, Platform Architecture and Software teams to define the power system micro architecture, implement the required HW and integrate it to a complex multi chip system.
Requirements:
3+ years of experience in digital design (preferably in SoC)
Familiar with advanced design practices (clock/voltage domain crossing, low power design and DFT) – Advantage
Familiar with various chip development tools (e.g. lint, synthesis, STA)
Familiar with verification methodologies
Strong Verilog/System Verilog skills
Experienced with scripting using common languages (e.g. Python, Perl, TCL)
Preferred Qualifications
BS.c/ MS.c in EE/ CE
3+ years of experience in digital design (preferably in SoC)
Familiar with advanced design practices (clock/voltage domain crossing, low power design and DFT) – Advantage
Familiar with various chip development tools (e.g. lint, synthesis, STA)
Familiar with verification methodologies
Strong Verilog/System Verilog skills
Experienced with scripting using common languages (e.g. Python, Perl, TCL)
Preferred Qualifications
BS.c/ MS.c in EE/ CE
This position is open to all candidates.
